A new benchmark leak hints that Intel is working away on yet another Lakefield CPU. Dubbed the Core i5-L15G7, the processor was picked in a Geekbench 5 benchmark by Twitter handle InstLatX64. The naming suggests we are looking at what could reasonably be a smaller less-powerful brother to the existing Core i5-L16G7.
According to the benchmark, the Core i5-L15G7 features five cores, one of which is a Sunny Cove, while the others are of the Tremont variety. The suggestion is that the base die is on the 22nm process, while the compute die opts for the 10nm process. This design appears to correlate with Intel teaming up Foveros for the Lakefield chips, which specializes in stacking chips vertically with TDP ratings somewhere between 5 W and 7 W.
Performance-wise, we are looking at a base clock speed of 1.38 GHz for the Core i5-L15G7, with a benchmark peak of 2.95 GHz. These speeds relate to the main Sunny Cove core. The Core i5-L15G7 also appears to have an L2 cache of 1.5 MB as well as an L3 cache of 4 MB.
With Intel aiming to take the fight to Qualcomm’s Snapdragon 835, which itself has eight Kryo 280 cores running at speeds of 2.6 GHz and 1.9 GHz via two subgroups, the company seems intent on keeping to the ethos of offering power-efficient performance with the Lakefield chips.
Looking at the benchmark scores, Intel’s Core i5-L15G7 appears to take the lead by a considerable margin. The single-core test returns a score of 725 points to 355 on Qualcomm’s chip, while the multi-core score is similarly in favor of Intel, although to a much lesser extent, with 1,566 points to the Snapdragon 835’s 1,533.
Of course, we shouldn’t take these results as definite nor as what we can expect from Intel’s Core i5-L15G7. Intel is likely to tweak the chip ahead of an anticipated release at the tail end of this year.
Additionally, Geekbench 5 isn’t necessarily the best judge of overall performance, so take these results with a pinch of salt before we hear anything official from Intel and see how the chip performs out in the real world.