Intel Tiger Lake CPU Data Dump Hints At Massive 12 MB L3 Cache

According to a CPU data dump obtained by Twitter user InstLatX64, Intel’s upcoming Tiger Lake processors are set to pack a significant boost in cache size.

Intel Tiger Lake

The Tiger Lake on display in the dump features four Willow Cove architectured cores and eight threads maxing out at 3.4 Ghz with a core clock speed of 1 GHz, alongside an AVX 512 ISA, and a massive 12 MB of L3 cache.

The Willow Cove architecture is slated as a significant step up from the existing Skylake and Ice Lake architectures which similarly share cache evenly across all cores.

Intel’s current quad-core standard sees each core allocated 2 MB of L3 cache for a total of 8MB L3 cache. In what represents a departure from the norm, Tiger Lake ups the reading to 3 MB per core to reach the 12 MB total. This represents an impressive 50% boost in cache size.

Willow Cove also signals a significant rejigging of the cache design rather than merely raising the MB count. From what we understand, the changes affect transistors and focus on optimizing the architecture thanks to the 10nm node tech while also reducing processor vulnerabilities through new security features. We can also expect a major next-gen I/O upgrade and the very latest display features.

The improvements also affect the GPU-CPU relationship with the inclusion of the Xe Graphics Engine tech in the Tiger Lake processors making them ideal candidates for a generational jump in discrete desktop GPUs, which are expected next year.

Final Word

As it stands, Intel’s Tiger Lake is expected to land sometime in 2020. Will you be buying it? Let us know in the comments below!